lp:~ubuntu-virt/qemu/+git/qemu-lp-import

Author: Richard Henderson
Author Date: 2024-05-31 18:10:10 UTC

Merge tag 'pull-target-arm-20240531' of https://git.linaro.org/people/pmaydell/qemu-arm into staging

target-arm:
 * hw/intc/arm_gic: Fix set pending of PPIs
 * hw/intc/arm_gic: Fix writes to GICD_ITARGETSRn
 * xilinx_zynq: Add cache controller
 * xilinx_zynq: Support up to two CPU cores
 * tests/avocado: update sbsa-ref firmware
 * sbsa-ref: move to Neoverse-N2 as default
 * More decodetree conversion of A64 ASIMD insns
 * docs/system/target-arm: Re-alphabetize board list
 * Implement FEAT WFxT and enable for '-cpu max'
 * hw/usb/hcd-ohci: Fix #1510, #303: pid not IN or OUT

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# gpg: Signature made Fri 31 May 2024 05:03:04 AM PDT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full]
# gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown]

* tag 'pull-target-arm-20240531' of https://git.linaro.org/people/pmaydell/qemu-arm: (43 commits)
  hw/usb/hcd-ohci: Fix #1510, #303: pid not IN or OUT
  target/arm: Implement FEAT WFxT and enable for '-cpu max'
  accel/tcg: Make TCGCPUOps::cpu_exec_halt return bool for whether to halt
  docs/system/target-arm: Re-alphabetize board list
  target/arm: Disable SVE extensions when SVE is disabled
  target/arm: Convert FCSEL to decodetree
  target/arm: Convert FMADD, FMSUB, FNMADD, FNMSUB to decodetree
  target/arm: Convert SQDMULH, SQRDMULH to decodetree
  target/arm: Tidy SQDMULH, SQRDMULH (vector)
  target/arm: Convert MLA, MLS to decodetree
  target/arm: Convert MUL, PMUL to decodetree
  target/arm: Convert SABA, SABD, UABA, UABD to decodetree
  target/arm: Convert SMAX, SMIN, UMAX, UMIN to decodetree
  target/arm: Convert SRHADD, URHADD to decodetree
  target/arm: Convert SRHADD, URHADD to gvec
  target/arm: Convert SHSUB, UHSUB to decodetree
  target/arm: Convert SHSUB, UHSUB to gvec
  target/arm: Convert SHADD, UHADD to decodetree
  target/arm: Convert SHADD, UHADD to gvec
  target/arm: Use TCG_COND_TSTNE in gen_cmtst_vec
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

Author: Richard Henderson
Author Date: 2024-05-31 18:10:10 UTC

Merge tag 'pull-target-arm-20240531' of https://git.linaro.org/people/pmaydell/qemu-arm into staging

target-arm:
 * hw/intc/arm_gic: Fix set pending of PPIs
 * hw/intc/arm_gic: Fix writes to GICD_ITARGETSRn
 * xilinx_zynq: Add cache controller
 * xilinx_zynq: Support up to two CPU cores
 * tests/avocado: update sbsa-ref firmware
 * sbsa-ref: move to Neoverse-N2 as default
 * More decodetree conversion of A64 ASIMD insns
 * docs/system/target-arm: Re-alphabetize board list
 * Implement FEAT WFxT and enable for '-cpu max'
 * hw/usb/hcd-ohci: Fix #1510, #303: pid not IN or OUT

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# gpg: Signature made Fri 31 May 2024 05:03:04 AM PDT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full]
# gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown]

* tag 'pull-target-arm-20240531' of https://git.linaro.org/people/pmaydell/qemu-arm: (43 commits)
  hw/usb/hcd-ohci: Fix #1510, #303: pid not IN or OUT
  target/arm: Implement FEAT WFxT and enable for '-cpu max'
  accel/tcg: Make TCGCPUOps::cpu_exec_halt return bool for whether to halt
  docs/system/target-arm: Re-alphabetize board list
  target/arm: Disable SVE extensions when SVE is disabled
  target/arm: Convert FCSEL to decodetree
  target/arm: Convert FMADD, FMSUB, FNMADD, FNMSUB to decodetree
  target/arm: Convert SQDMULH, SQRDMULH to decodetree
  target/arm: Tidy SQDMULH, SQRDMULH (vector)
  target/arm: Convert MLA, MLS to decodetree
  target/arm: Convert MUL, PMUL to decodetree
  target/arm: Convert SABA, SABD, UABA, UABD to decodetree
  target/arm: Convert SMAX, SMIN, UMAX, UMIN to decodetree
  target/arm: Convert SRHADD, URHADD to decodetree
  target/arm: Convert SRHADD, URHADD to gvec
  target/arm: Convert SHSUB, UHSUB to decodetree
  target/arm: Convert SHSUB, UHSUB to gvec
  target/arm: Convert SHADD, UHADD to decodetree
  target/arm: Convert SHADD, UHADD to gvec
  target/arm: Use TCG_COND_TSTNE in gen_cmtst_vec
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

Author: Paolo Bonzini
Author Date: 2024-05-25 08:03:22 UTC

target/i386: no single-step exception after MOV or POP SS

Intel SDM 18.3.1.4 "If an occurrence of the MOV or POP instruction
loads the SS register executes with EFLAGS.TF = 1, no single-step debug
exception occurs following the MOV or POP instruction."

Cc: qemu-stable@nongnu.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
(cherry picked from commit f0f0136abba688a6516647a79cc91e03fad6d5d7)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>

Author: Paolo Bonzini
Author Date: 2024-05-25 08:03:22 UTC

target/i386: no single-step exception after MOV or POP SS

Intel SDM 18.3.1.4 "If an occurrence of the MOV or POP instruction
loads the SS register executes with EFLAGS.TF = 1, no single-step debug
exception occurs following the MOV or POP instruction."

Cc: qemu-stable@nongnu.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
(cherry picked from commit f0f0136abba688a6516647a79cc91e03fad6d5d7)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>

Author: Paolo Bonzini
Author Date: 2024-05-25 08:03:22 UTC

target/i386: no single-step exception after MOV or POP SS

Intel SDM 18.3.1.4 "If an occurrence of the MOV or POP instruction
loads the SS register executes with EFLAGS.TF = 1, no single-step debug
exception occurs following the MOV or POP instruction."

Cc: qemu-stable@nongnu.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
(cherry picked from commit f0f0136abba688a6516647a79cc91e03fad6d5d7)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
(Mjt: context fixup for v8.1.0-1189-gad75a51e84af "tcg: Rename cpu_env to tcg_env")

Author: Michael Tokarev
Author Date: 2024-05-13 05:29:15 UTC

Update version for 8.2.4 release

Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>

Author: Michael Tokarev
Author Date: 2024-04-24 03:02:50 UTC

Update version for 7.2.11 release

Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>

Author: Michael Tokarev
Author Date: 2024-01-29 11:20:00 UTC

Update version for 8.1.5 release

Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>

Author: Michael Tokarev
Author Date: 2024-01-29 11:20:00 UTC

Update version for 8.1.5 release

Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>

Author: Michael Tokarev
Author Date: 2023-09-21 16:23:20 UTC

Update version for 8.0.5 release

Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>

Author: Michael Tokarev
Author Date: 2023-09-21 16:23:20 UTC

Update version for 8.0.5 release

Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>

Author: Jeuk Kim
Author Date: 2023-09-06 07:43:51 UTC

tests/qtest: Introduce tests for UFS

This patch includes the following tests
  Test mmio read
  Test ufs device initialization and ufs-lu recognition
  Test I/O (Performs a write followed by a read to verify)

Signed-off-by: Jeuk Kim <jeuk20.kim@samsung.com>
Acked-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-id: 9e9207f54505e9ba30931849f949ff6f474ac333.1693980783.git.jeuk20.kim@gmail.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

Author: Michael Roth
Author Date: 2021-12-23 15:52:09 UTC

Update version for v6.1.1 release

Signed-off-by: Michael Roth <michael.roth@amd.com>

Author: Michael Roth
Author Date: 2021-10-28 23:10:51 UTC

Update version for 6.0.1 release

Signed-off-by: Michael Roth <michael.roth@amd.com>

Author: Michael Roth
Author Date: 2020-09-15 16:27:07 UTC

Update version for 5.0.1 release

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>

Author: Michael Roth
Author Date: 2020-06-25 18:08:54 UTC

Update version for 4.2.1 release

Author: Michael Roth
Author Date: 2019-11-14 18:04:03 UTC

Update version for 4.1.1 release

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>

Author: Michael Roth
Author Date: 2019-10-17 20:15:33 UTC

Update version for 4.0.1 release

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>

Author: Michael Roth
Author Date: 2019-10-01 22:27:10 UTC

Update version for 3.1.1.1 release

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>

Author: Michael Roth
Author Date: 2019-04-12 03:27:39 UTC

Update version for 3.0.1 release

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>

Author: Michael Roth
Author Date: 2018-08-02 20:51:06 UTC

Update version for 2.12.1 release

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>

Author: Michael Roth
Author Date: 2018-06-27 03:27:39 UTC

Update version for 2.11.2 release

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>

Author: Michael Roth
Author Date: 2017-12-18 16:09:38 UTC

Update version for 2.10.2 release

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>

Author: Michael Roth
Author Date: 2017-09-07 16:25:12 UTC

Update version for 2.9.1 release

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>

Author: Michael Roth
Author Date: 2017-04-20 21:14:52 UTC

Update version for 2.8.1.1 release

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>

Author: Michael Roth
Author Date: 2016-12-23 15:38:06 UTC

Update version for 2.7.1 release

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>

Author: Michael Roth
Author Date: 2016-09-29 19:57:09 UTC

Update version for 2.6.2 release

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>

Author: Michael Roth
Author Date: 2016-05-09 16:10:47 UTC

Update version for 2.5.1.1 release

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com

Author: Michael Roth
Author Date: 2015-10-29 18:49:30 UTC

Update version for 2.4.1 release

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>

Author: Michael Roth
Author Date: 2015-08-10 21:09:34 UTC

Update version for 2.3.1 release

Author: Michael Roth
Author Date: 2015-03-10 17:29:35 UTC

Update version for v2.2.1 release

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>

Author: Michael Roth
Author Date: 2015-01-22 01:16:38 UTC

Update version for v2.1.3 release

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>

Author: Michael Roth
Author Date: 2014-08-18 15:59:46 UTC

Update VERSION for 2.0.2 release

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>

Author: Michael Roth
Author Date: 2014-07-21 22:41:40 UTC

Update VERSION for 1.7.2 release

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>

Author: Michael Roth
Author Date: 2013-12-10 00:19:25 UTC

Update VERSION for 1.6.2 release

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>

Author: Michael Roth
Author Date: 2013-08-22 16:21:34 UTC

Update VERSION for 1.5.3 release

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>

Author: Michael Roth
Author Date: 2013-05-23 22:12:44 UTC

update VERSION for 1.4.2

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>

Author: Michael Roth
Author Date: 2013-01-28 16:38:28 UTC

update VERSION for v1.3.1

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>

Author: Michael Roth
Author Date: 2012-12-11 21:09:44 UTC

update VERSION for v1.2.2

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>

Author: Michael Roth
Author Date: 2012-08-21 16:49:43 UTC

update VERSION for 1.1.2

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>

Author: Justin M. Forbes
Author Date: 2012-02-02 22:44:08 UTC

Version 1.0.1

Signed-off-by: Justin M. Forbes <jforbes@redhat.com>

Author: Justin M. Forbes
Author Date: 2011-10-11 14:46:03 UTC

Version 0.15.1

Signed-off-by: Justin M. Forbes <jforbes@redhat.com>

Author: Justin M. Forbes
Author Date: 2011-05-04 18:50:56 UTC

Version 0.14.1

Author: Aurelien Jarno
Author Date: 2011-01-17 18:29:34 UTC

target-mips: fix save_cpu_state() calls

The rule is:
- don't save PC if the exception is only triggered by softmmu.
- save PC if the exception can be triggered by an helper.

Fix a 64-bit kernel crash when loading modules.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
(cherry picked from commit b835e919f022d768abdf00e8dc94f1a23fdcab15)

Author: Markus Armbruster
Author Date: 2010-06-24 17:58:20 UTC

pc: Fix CMOS info for drives defined with -device

Drives defined with -drive if=ide get get created along with the IDE
controller, inside machine->init(). That's before cmos_init().
Drives defined with -device get created during generic device init.
That's after cmos_init(). Because of that, CMOS has no information on
them (type, geometry, translation). Older versions of Windows such as
XP reportedly choke on that.

Split off the part of CMOS initialization that needs to know about
-device devices, and turn it into a reset handler, so it runs after
device creation.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
(cherry picked from commit c0897e0cb94e83ec1098867b81870e4f51f225b9)

Author: Kevin Wolf
Author Date: 2009-12-03 09:28:44 UTC

qcow2: Bring synchronous read/write back to life

When the synchronous read and write functions were dropped, they were replaced
by generic emulation functions. Unfortunately, these emulation functions don't
provide the same semantics as the original functions did.

The original bdrv_read would mean that we read some data synchronously and that
we won't be interrupted during this read. The latter assumption is no longer
true with the emulation function which needs to use qemu_aio_poll and therefore
allows the callback of any other concurrent AIO request to be run during the
read. Which in turn means that (meta)data read earlier could have changed and
be invalid now. qcow2 is not prepared to work in this way and it's just scary
how many places there are where other requests could run.

I'm not sure yet where exactly it breaks, but you'll see breakage with virtio
on qcow2 with a backing file. Providing synchronous functions again fixes the
problem for me.

Patchworks-ID: 35437
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
(cherry picked from commit ef845c3bf421290153154635dc18eaa677cecb43)

Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

Author: Aurelien Jarno
Author Date: 2009-09-22 21:26:21 UTC

exec-all.h: increase MAX_OP_PER_INSTR to 96 from 64

The x86_64 ror instruction on a 32-bit host can generate up to 77 TCG
ops. Some more space should be left for opc that are added at the end
of the translation.

Thanks to Laurent Desnogues for the debugging help.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>